Are Internal Interfaces for 8K Displays Due for a Change?
There is already a lot of discussion about internal interfaces for 8K displays getting 8K from source devices to displays using HDMI, DisplayPort, or RJ-45, among others. In the display, decisions must still be made about moving the data around. These have a pretty significant technical and economic impact.
Once the content is in the monitor or TV, it is typically processed by a scaler SoC. After processing and scaling to match the native resolution of the display, the uncompressed 8K 4:4:4 data has to be sent to the timing controller (TCON) of the display. The TCON is the chip that ensures that all the correct data arrives at the right time for each pixel, sending it onward to the column (source) drivers of the display panel. That’s about a gigabit of data for every frame of 10-bit color at 60fps.
Traditionally, the data was sent from the TCON to the panel source drivers using LVDS/FPD Link technology, but when you get to 8K, there are 23,040 columns to drive, so you need that many pixel values for each line of the display. To support 8K, you need a lot of LVDS channels (48) and cables (96). To make things trickier, 8K displays are typically quite large, especially in TVs, adding to the challenges as cable lengths increase. That many cables and driver chips also add significantly to display panel cost.
As Resolution Increases, so Does the Challenge
An 8K display means twice as many lines per frame as for 4K and four times as many as for FullHD, so for higher resolutions, display makers have to be a bit cleverer to reduce the number of connections between the TCON and to deal with issues such as RFI. As long ago as 2015, Display Daily reported that “LVDS is horrible with UltraHD and 120Hz”.
Technology to the Rescue
V-by-One HS was an encoding system developed by THine Electronics of Japan in 2007 to overcome timing challenges when LVDS started to run very fast or over longer distances. THine made it an open standard.
LVDS had been developed to add clock signals to the base data to help with timing issues, adding to the noise and the number of connections. The V-by-One technology encoded the clock into a single serial line with the data, reducing the number of cables and overcoming the timing challenges. As resolution increase, the interface was speeded up by the development of V-by-One HS.
The technology was extended again in 2017 to go beyond the V-by-One HS chips, then used in most UltraHD/4K TVs. THine announced a new specification of V-by-One US that boosted speed up to 16 Gbps per lane to allow the support of 8K 60Hz images with just eight pairs of cables, compared to 192 pairs for LVDS!
Up to now, nearly all 8K LCD panels have used the ‘V-by-One’ technology to connect between the host processor in the display and the TCON, although a few have used an interface from Samsung called USI-T (Unified Standard Interface for TV). Samsung adopted V2 of the USI-T in driver chips in 2019 for use in display driver chips connected to panel columns. We reached out to Samsung for more background on this but have had no response at press time.
Hyphy has a New Idea for Internal Interfaces
At the recent Display Week exhibition, in the i-Zone for start-ups, we met up with Hyphy, an Australia-based company with a new display interface approach. It is developing transmitter and source driver ICs for 8K sets with up to 144Hz refresh support. The company has several patents for transmitting video signals over cables, or otherwise, that use spread spectrum technology, and it has a unique approach. Its bold claim is that its technology offers a 10X improvement in data transmission for image data.
The company is doing something different by using sampled analog data to transmit to the panel rather than digital data, which is used by LVDS and V-by-One. The fact is that LCDs and OLEDs use analog voltages and currents in the panels to set the color and brightness of the pixel. However, the signal coming to the display from the host system’s input, SoC, or whatever drives its display is digital. For simplicity, I’ll call that the ‘host controller’ in this article. At some point, you have to convert the digital to analog, which is currently done in the source driver chips bonded to the panel.
The digital data is sent in a lossless digital format from the host to the timing controller or TCON, which is effectively part of the panel. In contrast, the host controller is usually added by a set (TV/monitor, etc.) maker. From the host controller, the data is sent to the TCON in a lossless digital format and then on to the panel source drivers, where it is converted to analog.
Hyphy’s solution is to convert the signals back to analog at the TCON and send analog signals down the wires to the source drivers at a much lower frequency. It also uses ‘spread spectrum’ techniques, which allows you to reduce the amount of RFI at any particular frequency. The data transmission speed is also reduced, and you don’t need a clock, which makes things simpler. Instead of the 48 wire pairs at 1.5Gbps, you would need in an LVDS configuration and just 24 pairs at 760 Mbps, Hyphy says.
The transmission is not lossless, but as the firm knows what will happen to the signal over the transmission, it can apply compensation at the receiver end. The firm contends that the errors are ‘visually lossless’. That is to say, the data for the pixel is not perfectly accurate, but you won’t see the difference. (VESA applies the same logic with its DisplayStream Compression (DSC), which enables higher frame rates, color depth, and resolution). Hyphy also points out that although its system may be lossy in some applications, artifacts may be less visible than with codec technologies that may have processed the signal.
The lower frequency of data combined with the spread spectrum technique means that you no longer have to deal with expensive cables or worry about their length. The firm said it had tested the interface up to 300 meters using just a UTP network cable, so getting data from one side to another of a 100″ panel is not an issue. That’s not true for LVDS approaches.
Of course, there is a question of whether you need a separate timing controller – you can probably integrate it into the host controller and be analog from the host to the panel. However, that raises a lot of questions that go beyond the scope of this article!
What We Saw at Display Week
The proof of the pudding is, of course, in the eating. At Display Week, the company showed its technology by taking an HDMI signal in, sending it via its transmitter chip to a UTP network cable, then back into its receiver for display. The firm has a video online here that shows some live captures. The 8K Association has a video from Display Week that summarises the technology and shows the demo.
Another area where the firm believes it has an advantage is that its chips can use a very well-established low process node – it has used 180nm, although production volume would be better made on 90nm-130nm. Those chips do not seem to have a problem in supply at the moment and should be a lot cheaper than some of the chips used in digital interfaces, which need much higher technology nodes.
At the moment, Hyphy, to get things started, is developing and supplying chips on a ‘fabless model’, but if it is as successful as it believes it can be, it will transition to an IP licensing model. Of course, it would make a lot more sense to build the transmitters into other chips and that would be enabled by ip licensing.
Unsurprisingly, given the firm’s advantages with its technology, it is aiming its first products at large 8K displays.